Non-volatile memory is an integral part of many electronic devices from mobile phones, digital cameras, and set-top boxes, to automotive engine controllers primarily because of its ability to store data even when power is turned off. One type of non-volatile memory, namely, phase change (PC) memory, is aimed at eventually supplanting flash memory technology which is used abundantly in such electronic devices. Modern phase change random access memory (PRAM) typically requires that a PC memory cell employed therein be compatible with existing field-effect transistor (FET) technology. However, PC memory cell volume must be very small so as to ensure that set and reset currents in the PC memory cell are smaller then a maximum FET current, which is difficult to achieve using present complementary metal-oxide semiconductor (CMOS) fabrication technology, such as, for example, a 90 nanometer (nm) process.
As is known, PC memory cells are generally based on storage elements which utilize a class of materials, such as chalcogenides, that have the property of switching between two distinct states, the electrical resistance of which varies according to the crystallographic structure of the material. A high-resistance, reset state is obtained when an active region of the phase change material (PCM) is in an amorphous phase, whereas a low-resistance, set state is obtained when the PCM is in a crystalline or polycrystalline phase. The PCM can be selectively switched between the two phases by application of set and reset currents to the PC memory cell.
Reducing the amount of current required by a PCM layer to change its crystalline phase can beneficially decrease power dissipation and improve reliability during operation of the PC memory cell. Consequently, attempts have been made to define current flow in the PC memory cell so as to provide more efficient self-heating (e.g., Joule heating) of the PCM in the cell. Existing solutions for defining current flow in a PC memory cell, which in turn defines an active PC memory cell volume, rely predominantly on pushing lithography and etching capabilities to their limits. Presently, existing lithography, including, for example, deep ultraviolet (DUV), e-beam, etc., is limited to a line resolution of about 45 nm. Such lithography techniques are already challenging, especially when forming small features having an island shape (preferably circular).
In particular, one of the smallest elements in a conventional PC memory cell is a heater which is typically located on one side of the PCM. The small heater is often ineffective and challenging to manufacture, and thus adds significantly to the cost of the PC memory cell. In order to achieve satisfactory results using small set/reset currents, the heater in the PC memory cell needs to be localized well inside the PCM. Moreover, a common failure mechanism in PC memory cells results from an open circuit condition due primarily to repeated stress associated with a set/reset operation, and therefore it is even more desirable to minimize the set/reset currents in the PC memory cell so as to ensure reliability of the cell.
Accordingly, there exists a need for improved techniques for defining current flow in a PC memory cell that does not suffer from one or more of the problems exhibited by conventional PC memory cells.